NanoCool Low Power Design Seminar Series Kicks off in San Jose; Sequence, Artisan, Sun, Novas, Golden Gate, Tensilica to Provide Blueprint for Defeating Design Enemy #1
SANTA CLARA & SUNNYVALE, Calif.—(BUSINESS WIRE)—July 27, 2004—
Sequence Design is leading the charge along with Artisan
Components, Inc., (Nasdaq:ARTI) and Sun Microsystems, Inc.
(Nasdaq:SUNW) in sponsoring NanoCool(TM) seminars that will explore
logical and physical low-power design methodologies. Novas Software,
Inc., Golden Gate Technology Inc. and Tensilica, Inc. will also
present at the seminar.
RTL power estimation, power debug, voltage-drop analysis, power
modeling, power grid design and leakage reduction will all be explored
during the seminar. Dennis Sylvester, professor at the University of
Michigan, will be the keynote speaker at the San Jose seminar. The
topic of his keynote will be "New Approaches to Total Power Reduction
Including Runtime Leakage."
"Today, effective power management is the key to nanometer SoC
design success," said Vic Kulkarni, Sequence president and CEO.
"Sequence along with its partners is leading the new era of
'power-aware' design."
According to Neal Carney, Artisan's vice president of marketing,
"To overcome the complex nanometer design challenges and gain greater
confidence in meeting power and performance budgets, it's important to
provide IP that supports various power reduction solutions that
include accurate power and signal integrity modeling."
"The power problem is the No. 1 issue in the long-term for
computing. It's time for us to stop making 6-mile-per-gallon gas
guzzlers," said Greg Papadopoulos, chief technology officer with Sun
Microsystems (San Jose Mercury News, 7/2/04).
The Challenges to Power Management
The earliest forms of low power design involved the basic practice
of reducing the power supply voltage, either in the entire design or
in certain parts. The attractiveness of this approach was, and still
is, the quadratic relationship between the supply voltage and the
resulting power consumption. An additional method involves the use of
more advanced semiconductor processes with narrower transistors and
shorter wires -- all else being equal, the reduction in parasitic
capacitances due to the smaller geometries results in less dynamic
power.
Today, these approaches are no longer enough and in some cases --
such as sub-threshold leakage -- counter productive. "10X reductions
in leakage can be achieved through the use of smart power gating
techniques," said Jerry Frenkil, vice president of advanced
development with Sequence.
The time for a comprehensive RTL to sign-off power integrity
solution is now. "Being able to run power analysis at RTL is very
important because it allows us to get a handle on power consumption
very early in the design process, and then make appropriate changes to
reduce power," said Himanshu Sanghavi, hardware engineering manager,
Tensilica. "By getting these insights at RTL, we can meet our power
goal more efficiently."
"Debugging power-related issues is critical when dealing with
large complex designs with low power restrictions," said Dave Kelf,
vice president of marketing at Novas. "Being able to analyze localized
power problems accelerates silicon closure while enabling higher
degrees of design performance optimization."
"Power reduction at the RTL and device level no longer needs to be
given back with physical synthesis," said Tom Minot, vice president of
marketing and sales, Golden Gate Technology. "At the physical level,
effective power grid design must account for power consumption at RTL.
An under-designed grid can lead to significant voltage drop and design
closure challenges."
Online Registrations
The NanoCool seminar series will kick off with the first seminar
at Capital Club Athletics in downtown San Jose on Wednesday, August
04, 2004. To register for the first NanoCool Low-Power Seminar visit
http://www.sequencedesign.com/nanocool.html. Interested parties may
also contact Sequence's seminar hotline directly at 408-961-2300, or
via e-mail at seminars@sequencedesign.com.
NanoCool Initiative
NanoCool is a collaboration among semiconductor designers, EDA
tool vendors, IP companies and library suppliers, to provide a
complete power integrity flow that includes concurrent voltage-drop
and power management, timing and signal-integrity capabilities to help
achieve rapid electrical sign-off and design closure at 130-nm and
below.
About Sequence
Sequence Design, Inc. enables system-on-chip designers to bring
higher-performance and lower-power integrated circuits quickly to
fabrication. Sequence's power and signal integrity software give its
more than 130 customers the competitive advantage they need to excel
in aggressive technology markets, despite demanding complexity and
time-to-market issues of nanometer design.
Sequence has worldwide development and field service operations.
The company was recently named by Reed Electronics as one of the top
10 companies to watch in the electronics industry. Sequence is
privately held. Sequence is a member of Cadence Design Systems'
Connections(TM) and Mentor Graphics' Open Door(TM) partnership
programs. Additional information is available at sequencedesign.com.
About Artisan Components
Artisan Components, Inc. is a leading provider of physical
intellectual property (IP) components for the design and manufacture
of complex system-on-a-chip integrated circuits. Artisan's products
include embedded memory, standard cell, input/output, analog and
mixed-signal components, which are designed to achieve the best
combination of performance, density, power and yield for a given
manufacturing process. Artisan has licensed its IP components to over
2,000 companies involved in integrated circuit design. Artisan is
headquartered in Sunnyvale, California. More information about Artisan
Components, including free library access, can be found at
www.artisan.com.
All trademarks mentioned herein are the property of their
respective owners.
Contact:
Artisan Components, Inc.
Claudia Natalia, 408-548-3172
claudia@artisan.com
or
Sequence Design, Inc.
Greg Fawcett, 408-961-2365
gfawcett@sequencedesign.com
